1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a charge transfer device controlled by two driving pulses.
2. Description of the Related Art
In a solid-state image pickup device such as a charge coupled device (CCD), the electrons produced by a photodiode are utilized as means of conveying image information. In order to transfer the image information to a signal processor such as a display which actually restores the information, a charge transfer device is called for. The charge transfer device is controlled by a control device placed outside of the transfer device. As is well known, the charge transfer device may be referred either to a vertical transfer part or to a horizontal transfer part of a CCD.
For example, the two-phase drive charge transfer device disclosed in Japanese Laid-Open Patent Publication Hei 6-314706 (1994) has the following a structure.
FIG. 1(a) shows the structure of the charge transfer device. The device has an N-type semiconductor layer 2 formed on a P-type semiconductor substrate 1. In the N-type semiconductor layer 2, there are formed N.sup.- -type semiconductor regions 6 by a selective ion implantation of, for example, boron. As a result, there are formed alternating regions of N-type and N.sup.- -type. A silicon oxide film, that is, an insulating film 3 is formed by thermal oxidation on the N-type semiconductor regions 2 and the N.sup.- -type semiconductor regions 6. First electrodes 4 are formed on the insulating film 3 so as to cover each of a part of the N-type semiconductor regions 2. An insulating film 5 is formed on the first electrode. Further, second electrodes 8 are formed so as to cover each of the remaining part of the N-type semiconductor region 2 and a part of each of the N.sup.- -type semiconductor regions 6. As shown in FIG. 1(a), the second electrodes 8 are formed consecutively, grouped into two types of even-numbered electrodes 8a and odd-numbered electrodes 8b. The electrodes 8a receive a clock pulse .phi..sub.1 from a control device while the electrodes 8b receive a clock pulse .phi..sub.2 from the control device. The first electrodes 4 receive a constant voltage V.sub.M.
Next, referring to FIGS. 1(b), 1(c) and 1(d), the operation of the charge transfer device as shown in FIG. 1(a) will be described. The clock pulses .phi..sub.1 and .phi..sub.2 are signals that vary complementary with each other as shown in FIG. 2. The constant voltage V.sub.M is an inter-mediate potential between the high level and the low level of the clock pulses .phi..sub.1 and .phi..sub.2. FIG. 1(b) shows an electric potential diagram of the device at the time tb in FIG. 2. Similarly, FIGS. 1(c) and 1(d) are electrical potential diagrams at the times tc and td, respectively, in FIG. 2. In the description that follows it will be assumed that the charge transfer device illustrated by FIG. 1(a) represents a horizontal transfer part of a CCD.
At the time tb, a high level voltage V.sub.H is applied to the electrodes 8a and a low level voltage V.sub.L is applied to the electrodes 8b. In this situation, the transfer of a signal charge 110 transferred from a vertical transfer part of the CCD will now be described.
In this case, signal charges 110 are accumulated in the N-type semiconductor regions 2 covered with the electrodes 8a. This is because the electrodes 8a are receiving the high level voltage V.sub.H, and hence their electric potential is the deepest.
At the time tc, the electric potential of the semiconductor regions covered with the electrodes 8a becomes shallow and the electric potential of the semiconductor regions covered with the electrodes 8b becomes deep, due to variations in the potentials of the clock pulses .phi..sub.1 and .phi..sub.2. The situation is as illustrated in FIG. 1(c).
At the time td, the low level voltage V.sub.L is applied to the electrodes 8a and the high level voltage V.sub.H is applied to the electrodes 8b. In comparison to the situation at the time tc, the electric potential of the semiconductor regions covered with the electrodes 8a becomes shallower and the electric potential of the semiconductor regions covered with the electrodes 8b becomes deeper. Accordingly, the signal charges 110 accumulated at the time tb in the N-type semiconductor regions 2 covered with the electrodes 8a make transitions at the time td as indicated by the arrow in FIG. 1(d). That is, the charges, are accumulated in the N-type semiconductor regions 2 covered with the electrodes 8b.
Thereafter, the signal charges 110 are transferred sequentially by the repetition of the above operation.
However, a CCD chip with the conventional charge transfer device built in requires a constant voltage V.sub.M which is different from the voltages V.sub.H and V.sub.L that can be taken by the clock pulses .phi..sub.1 and .phi..sub.2. Hence, it is necessary to install a constant voltage generator which generates the constant voltage V.sub.M by processing a power supply voltage, on the outside or inside of the chip. When the constant voltage generator is installed within the chip, the CCD chip will necessarily become large sized. On the contrary, when the constant voltage generator is installed outside the chip, it becomes necessary to furnish terminals to receive the constant voltage on the CCD chip, which will also hamper the miniaturization of the chip.